Design a logic circuit that multiplies two 2-bit binary numbers
Design a logic circuit that multiplies two 2-bit binary numbers and generates a 4-bit product
which then will be displayed on a single 7-segment display device.
Your task is to design a multiplier and a decoder as explained in parts 1 and 2. These circuits can
then be interfaced to a 7-segment display device which will display the product of the two binary
numbers in decimal format.
Part 1 – Design of the 2-bit multiplier
Design a combinational logic circuit that receives two 2-bit numbers on its input and produces a
4-bit product on its output. Use K-maps to implement the minimum SOP for your design. Use
active high inputs and active high outputs.
Part 2 – Design of the 7-segment decoder
Design a decoder that has four inputs and seven outputs. The decoder’s inputs come from the
4-bit output of the multiplier. The decoder’s outputs can be applied to a 7-segment display
device. Use K-maps to implement the minimum SOP for your design.
WRITTEN COMMUNICATION USAGE:
A formal written report is required for this assignment. The formal report format will be in
accordance with the “Written Grading Guide” shown below.
WRITTEN GRADING GUIDE:
POSSIBLE POINTS
0. Cover page 10 ________________
1. Introduction 10 ________________
2. Diagrams 10 ________________
3. Results 10 ________________
4. Discussion of Results 20 ________________
5. Possible Applications 10 ________________
6. Conclusions 20 ________________
7. Supporting Documents 10 ________________
